The present invention relates to a reset circuit. More specifically, the present invention relates to a power-on reset circuit used in low power supply voltage applications.
This invention relates to integrated circuit building blocks more commonly known as Power-On Reset (also known by the three letter acronym “POR”) circuits. Such known circuits may be used to reset a part or the entirety of an integrated circuit chip upon the application of a power supply voltage. This is a hardware reset function, working entirely without the need for software control. The mere application of a power supply voltage enables this circuit to set the state of any register to which it is connected.
In prior art POR circuits, the fundamental method used to detect that a minimum voltage level resides at the power supply pins of the integrated circuit or integrated circuit block employs the turn-on point of a PFET transistor (commonly referred to as the “threshold voltage” or “Vt”). However, advancements in integrated circuit technologies, with their physically scaled feature sizes, have forced reductions in the power supply voltage level (i.e., to less than about 2.0 volts) in order to achieve reliable operating lifetimes for the products delivered to the market.
Unfortunately, the Vt of such known fabrication processes has not been directly scaled with the power supply reduction associated with each new generation of silicon technology. As a result, the known circuit techniques employed when power supplies were greater (ranging from about 3 to about 5 volts) are no longer able to adequately provide the level of control necessary for the currently available power supply levels.
Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of skill in the art, through comparison of such systems with the present invention as set forth in the remainder of the present application with reference to the drawings.